For high-frequency applications, bipolar transistors, and in particular heterojunction bipolar transistors (HBT), are currently used. It is known to integrate bipolar transistors in standard CMOS methods.
The fabrication of a bipolar transistor from a stack of semiconductor regions forming the emitter, the base, and the collector of the transistor poses various problems. In particular, a problem is to form a base contact region while keeping a low resistance of access to the base region and a low stray capacitance between the base and the collector.
United States Patent Application Publication No. 2017/0236923, incorporated by reference, teaches a heterojunction bipolar transistor and method of manufacturing. Concerns with this heterojunction bipolar transistor and method of manufacturing include: the process flow is too complicated; the resulting device suffers from concerns with robustness; the nitride remaining at the end of the process flow contributes to reliability issues; the process is difficult to implement at small processing nodes (such as 28 nm) due to the height of the structure leading to difficulties with premetallization dielectric construction and contact patterning modification; and the emitter resistance is not optimal due to the emitter “plug” effect (a key parameter for high speed operation).
It would thus be desirable to have a heterojunction bipolar transistor and a method of manufacturing a heterojunction bipolar transistor that solves at least some of the foregoing problems.